Solid state amplifiers are widely used for radio-wave, microwave and milli-meter wave communications. These amplifiers are well suited for medium power applications up to a couple of hundred of watts due to their low noise, low power requirements, and dense packaging. The development of Gallium Arsenide (GaAs) Metal Semiconductor Field Effect Transistor's (MESFET) has made solid state devices more attractive for high frequency amplifier design. These amplifiers are capable of low noise, high gain and high power operation. They operate from a low voltage power source, have relatively high power added efficiency (PAE), and are highly reliable. These amplifiers may be incorporated into GaAs monolithic microwave integrated circuits (MMIC) for wireless communications. Several manufacturers have developed and marketed high performance GaAs MMIC transceiver chips for wireless local area network (WLAN) applications in the 2.4 GHz. to the 2.5 GHz range. The Raytheon RMTC2410-10 and the Celeritek CCS2900 are examples of such devices. In these applications it is desirable to design the high frequency transmit power amplifier to operate at multiple power levels to minimize interference with other transceiver devices.
Various techniques have been employed to provide multiple power level capability for wireless communications. One way is to place an attenuator between two power amplifier stages to reduce the output signal level. This design results in low efficiency, and hence undesirable power consumption, because the power amplifier stages still draw bias current.
Variable Gain Amplifiers (VGA) have also been employed in this area to produce multiple power level outputs. Typically, a parallel arrangement of Field Effect Transistors (FET) may be disposed between a power divider and power combiner network. By selectively supplying a gate bias to each amplifier, DC power consumption may be reduced when operating in lower power modes. An example of this approach is described in U.S. Pat. No. 4,439,744. However, this design results in poor impedance matching due to the changing source impedance as the FET's are switched in and out. Consequently, this design suffers from low efficiency, reduced gain and undesirable power consumption.
Accordingly, there is a need for a multiple power level amplifier that maintains high efficiency for all power output levels. A higher efficiency will result in reduced DC power consumption when transmitting at lower power which will result in prolonged battery life in desktop, laptop and handheld computer environments.